“As a leader in the area of detecting and avoiding soft errors, we are proactively taking this step to deliver high-quality test results to our customers, even though many of them can conduct these tests themselves,” said Helmut Puncher, Director for Technology at Cypress in San Jose.
The agreement covers the tests of a multiple devices, and will be conducted at different neutron labs such as the Los Alamos Neutron Sciences Center (LANSCE) at Los Alamos National Laboratory in New Mexico and the Theo Sveberg Labs in Uppsala, Sweden. Cypress will benefit from the expertise gained by iRoC Technologies in testing the latest technology nodes, its most recent progress in tester and detection algorithms development, and its flexibility in scheduling test campaign throughout the year thanks to its test shuttle program. Test algorithms will detect not only SBU (Single Bit Upsets), but also MCU (Multi Cell Upsets), Latch ups, SEFI (Single Event Failure Interrupt), Snapbacks and other device specific failure modes.
“iRoC Technologies’ test business unit is positioned as a totally independent test house which is leveraging its wide experience to provide its customers an accurate and reliable test methodology. This agreement with Cypress is mutually beneficiary as Cypress can get customized and consistent service for all the tests, and iRoC can leverage its familiarity with Cypress processes over multiple tests,” said Olivier Lauzeral, President at iRoC Technologies Corporation. “Our high-quality testing methodology uses identical procedures for each device in a controlled environment so tests are repeatable and results can be compared with confidence.”
“As one of the leading global SRAM supplier we think a superior soft error performance is a competitive advantage for CYPRESS, and its effort to stay ahead of the reliability challenge,” continued Puchner. “Our innovative design solution to eliminate SEL (Single Event Latchup) has been very successful in the market place and is considered a competitive solution for space and satellite applications.”
Furthermore, according to Puchner, by analyzing soft error test results early, CYPRESS is able to optimize design and manufacturability so customers can hit the market in time without compromising product quality.
Test Methodology and Results
iRoC will conduct a series of tests, based on a super-set of the industry-prescribed JESD-89 test methodology, to determine the failure rate of different devices.
When high-energy neutrons penetrate memory cells, it is probable that functional failure will occur, causing the device to operate in an unpredictable manner. This harmful effect can occur not only under high-altitude conditions, but also in ground-based applications.
Error Correcting Code (ECC) protects against single bit upsets (SBU) in memories, but this solution misses its goal for MCU and SEFI, which are proving more prominent in small geometries. The most advanced companies in their fields are bracing to face this new challenge.
About Cypress
Cypress solutions are at the heart of any system that is built to perform: consumer, computation, data communications, automotive, industrial, and solar power. Leveraging a strong commitment to customer service and performance-based process and manufacturing expertise, Cypress's product portfolio includes a broad selection of wired and wireless USB devices, CMOS image sensors, timing solutions, network search engines, specialty memories, high-bandwidth synchronous and micropower memory products, optical solutions, and reconfigurable mixed-signal arrays. Cypress stock is traded on the New York Stock Exchange under the ticker symbol CY.
About iRoC Technologies
iRoC Technologies Corporation is the leader of soft errors solutions. The company is headquartered in Grenoble, France and in Santa Clara, CA for US and Asia operations. For more information about IRoC Technologies, visit www.iroctech.com.
iRoC Technologies will be present at DESIGNCON 2007 in Santa Clara. Please visit us at booth #724.
